Circuit board

ABSTRACT

This invention relates to circuit boards and methods of fabricating circuit boards. A circuit board includes a core layer and a surface layer. The core layer includes a number of fibers and the surface layer has a thickness that is between about 10% and about 30% of the circuit board thickness. Including fibers in the core layer increases the strength of the circuit board. The surface layer is essentially free of fibers and relatively thick. The thickness of the surface layer inhibits the formation of cracks in the circuit board, which improves the reliability of circuits and systems coupled to the circuit board.

This application is a Divisional of U.S. application Ser. No.10/857,738, filed May 28, 2004, which is a Divisional of U.S.application Ser. No. 09/643,526, filed Aug. 22, 2000, now U.S. Pat. No.6,757,176, both of which are incorporated herein by reference.

FIELD OF THE INVENTION

This invention relates to circuit boards, and more particularly, toincreasing circuit board reliability.

BACKGROUND OF THE INVENTION

Printed circuit boards, which are used in the manufacture of electrical,mechanical, electromechanical, and other kinds of products, provide asubstrate for mounting a die on which integrated circuits, such asprocessors, memories, and amplifiers, are fabricated. FIG. 1 shows across-sectional view of a prior art ball-grid array (BGA) package 100which includes printed circuit board 103 coupled to board 105 by solderballs 107, and die 109 coupled to printed circuit board 103 by adhesive111 and molding compound 112.

A longstanding and unsolved problem with printed circuit boards ingeneral and with BGA package 100 in particular is that printed circuitboard 100 may develop a crack, such as crack 113. Crack 113 destroys thestructural integrity of BGA package 100. Once the structural integrityof BGA package 100 is destroyed, unforseen stresses may break or damageelectronic connectors, such as electronic connectors 115 and 116, and asa result, any product in which BGA package 100 is incorporated maymalfunction. One method of solving problems associated with printedcircuit board cracking and the resulting electronic connection failuresis to include a second printed circuit board in the design of anelectronic system. The second circuit board is a redundant printedcircuit board which mirrors the operation of the primary board, so asystem failure occurs only when both the redundant printed circuit boardand the primary board fail at the same time. Unfortunately, thissolution is very expensive and is cost effective only in systems, suchas trains, airplanes, or spacecraft, where the cost of failure is high.For systems in which the cost of failure is low, redundant circuitboards are seldom used.

For these and other reasons there is a need for the present invention.

SUMMARY OF THE INVENTION

The above mentioned problems with cracking in circuit boards and otherproblems are addressed by the present invention and will be understoodby reading and studying the following specification. A circuit board isdescribed that includes embedded fibers, which strengthen the board, anda surface layer having a certain thickness range that inhibits theformation of cracks in the circuit board.

The present invention provides, in one embodiment, a circuit boardincluding a core layer and a surface layer. A number of fibers areembedded in the core layer. The surface layer has a thickness which isbetween about 10% and about 30% of the circuit board thickness.Embedding fibers in the core layer increases the strength of the circuitboard. A surface layer thickness of between about 10% and about 30% ofthe circuit board thickness inhibits the formation of cracks in thecircuit board, which improves the reliability of circuits mounted on thecircuit board and systems in which the circuit board is embedded.

In an alternate embodiment, the present invention provides a method offabricating a circuit board having a circuit board thickness. The methodincludes forming a core layer including a number of fibers, and forminga surface layer on the core layer. The surface layer has a surface layerthickness that is between about 10% and about 30% of the circuit boardthickness and is free of fibers.

These and other embodiments, aspects, advantages, and features of thepresent invention will be set forth in part in the description whichfollows, and in part will become apparent to those skilled in the art byreference to the following description of the invention and referenceddrawings or by practice of the invention. The aspects, advantages, andfeatures of the invention are realized and attained by means of theinstrumentalities, procedures, and combinations particularly pointed outin the appended claims.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is an illustration cross-sectional view of a prior art ball-gridarray (BGA) package including a circuit board.

FIG. 2A is a cross-sectional view of one embodiment of a circuit boardassembly according to the teaching of the present invention.

FIG. 2B is a cross-sectional view of an alternate embodiment of acircuit board assembly according to the teaching of the presentinvention.

FIG. 2C is a cross-sectional view of a second alternate embodiment of acircuit board assembly according to the teaching of the presentinvention.

FIG. 3 is a block diagram of one embodiment of a computer systemsuitable for use in connection with the present invention.

DETAILED DESCRIPTION

In the following detailed description of the preferred embodiments,reference is made to the accompanying drawings which form a part hereof,and in which is shown by way of illustration specific preferredembodiments in which the invention may be practiced. These embodimentsare described in sufficient detail to enable those skilled in the art topractice the invention, and it is to be understood that otherembodiments may be utilized and that logical, mechanical and electricalchanges may be made without departing from the spirit and scope of thepresent inventions. The following detailed description is, therefore,not to be taken in a limiting sense, and the scope of the presentinvention is defined only by the appended claims.

FIG. 2A is a cross-sectional view of one embodiment of circuit boardassembly 200. Circuit board assembly 200 includes die 201, printedcircuit board 202, and board 203. Circuit board 202 is coupled to board203 by solder balls 204, and die 201 is coupled to printed circuit board202 by adhesive 205 and molding compound 206.

Circuit board assembly 200 is sometimes referred to as a ball-gridarray, but the present invention is not limited to ball-grid arraycircuit board assemblies. Any circuit board assembly that includes acircuit board, such as printed circuit board 202, which is described inmore detail below, is suitable for use in connection with the presentinvention. For example, a circuit board assembly in which a firstcircuit board is coupled by edge connectors to a second circuit board issuitable for use in connection with the present invention.

Die 201 includes an integrated circuit, such as a memory circuit, aprocessor, an amplifier, or an application specific circuit (ASIC).Memory circuits suitable for use in connection with the presentinvention include but are not limited to dynamic random access memory(DRAM) circuits, static random access memory (SRAM) circuits, erasableprogrammable memory (EPROM) circuits, and electrically erasableprogrammable memory (EEPROM) circuits. Processor circuits suitable foruse in connection with the present invention include but are not limitedto microprocessors, digital signal processors (DSPs), and reducedinstruction set computing (RISC) processors. Amplifier circuits suitablefor use in connection with the present invention include but are notlimited to operational amplifiers, differential amplifiers, and poweramplifiers. Application specific integrated circuits (ASICs) suitablefor use in connection with the present invention includetelecommunication circuits, such as telecommunication interfacecircuits. Die 201 is coupled to printed circuit board 202 by adhesive205, which is selected to maintain a low stress interface between die201 and circuit board 202. Any adhesive that has a coefficient ofthermal expansion which maintains a low stress interface between die 201and circuit board 202 during the heating and cooling of circuit boardassembly 200 is suitable for use in connection with the presentinvention.

A board 203, such as a circuit board, provides a substrate for mountinga number of circuit boards, such as circuit board 202, and otherelectronic or electro-mechanical components. In one embodiment, board203 is a computer system circuit board including a processor. Board 203may also provide a substrate suitable for securing circuit assembly 200to a larger package or other housing, such as a cabinet or case. Board203 is fabricated from materials commonly used in the fabrication ofcircuit boards, such as polymeric composite materials. One example of apolymeric composite material is phenolic. However, board 203 is notlimited to polymeric composite materials, and other materials,particularly insulating materials, may also be used in the fabricationof board 203.

Solder balls 204 provide a number of signal paths to electronicallycouple circuit board 202 to board 203. The number of signal paths permitcommunication between components mounted on circuit board 202 and onboard 203. Any material that is a good conductor is suitable for use infabricating solder balls 204. Tin, gold, copper, silver, and alloys oftin, gold, copper, and silver, are examples of materials suitable foruse fabricating solder balls 204.

Circuit board 202, as shown in FIG. 2A, provides a substrate formounting die 201 and coupling signals to board 203. In one embodiment,circuit board 202 is formed from a polymeric composite material. Circuitboard 202 is coupled to die 201 by adhesive 205.

FIG. 2B is a detailed cross-sectional view of one embodiment of circuitboard 202. In this embodiment, circuit board 202 includes core layer 208and surface layer 209, which is a first layer or a first resin layer.Circuit board 202 may also include slot 211 for routing conductiveconnectors, such as conductive connectors 207 and 208 shown in FIG. 2A,from above circuit board 202 to below circuit board 202.

Core layer 208 includes one or more fibers 213 embedded in an insulator.Core layer 208, in one embodiment, is fabricated from a resin and has athickness 212 of between about 0.006 inches and about 0.012 inches. Theone or more fibers 213, in one embodiment, are glass fibers having adiameter of between about 0.0005 inches and about 0.001 inches. In analternate embodiment, the one or more fibers 213 are woven fibers, suchas woven glass fibers, and have a diameter of between about 0.001 inchesand about 0.002 inches.

Surface layer 209, in one embodiment, is fabricated from a resin that isfree of fibers. In an alternate embodiment, surface layer 209 isfabricated from a resin that is essentially free of fibers. Surfacelayer 209 is essentially free of fibers when any fibers embedded insurface layer 209 do not significantly increase the likelihood ofcracking in circuit board 202. The inventors discovered that cracks incircuit board 202 frequently occur on the surface of circuit board 202at stress concentration points located above fiber hills, such as fiberhills 215 and 217, and that cracks are less likely to occur at stressconcentration points located above fiber valleys. In board assembly 200,stress concentration points occur along an edge of an interface betweentwo surfaces, such as along the edge of adhesive 205 at the interfacebetween adhesive 205 and circuit board 202, as shown in FIG. 2A. Theinventors also discovered that cracks at stress concentration pointswere most likely to occur during the solder reflow process, whentemperature gradients are formed in board assembly 200. Once a surfacecrack, such as surface crack 219 intersects with a fiber, such as theone or more fibers 213, the crack proceeds along the interfacialinterface between the one or more fibers 213 and the material in whichthe one or more fibers 213 is embedded. According to the teachings ofthe present invention, the inventors also discovered that by increasingthickness 210 of surface layer 209 to between about 10% and 30% ofcircuit board thickness 221, the likelihood of crack formation on thesurface of circuit board 202 is decreased. Therefore, in the novelcircuit board of the present invention, the thickness 210 is preferablybetween about 10% and about 30% of circuit board thickness 221.

FIG. 2C is a detailed cross-sectional view of an alternate embodiment ofcircuit board 202. In this embodiment, circuit board 202 includes corelayer 223, first surface layer 225, and second surface layer 227. Corelayer 223 is located between first surface layer 225 and second surfacelayer 227.

Core layer 223 includes one or more fibers 231 embedded in core layer223. Core layer 223, in one embodiment, is fabricated from a resin andhas a thickness 229 of between about 0.006 inches and about 0.012inches. Core layer 223 also has greater mechanical strength than firstsurface layer 225 or second surface layer 227. The one or more fibers231, in one embodiment, embedded in core layer 223, are glass fibershaving a diameter of between about 0.0005 inches and about 0.001 inches.In an alternate embodiment, the one or more fibers 231 are woven fibers,such as woven glass fibers, and have a diameter of between about 0.001inches and about 0.002 inches.

First and second surface layers 225 and 227, in one embodiment, arefabricated from a resin that is free of fibers. In an alternateembodiment, first and second surface layers 225 and 227 are fabricatedfrom a resin that is essentially free of fibers. First and secondsurface layers 225 and 227 are essentially free of fibers when anyfibers embedded in first and second surface layers 225 and 227 do notsignificantly increase the likelihood of cracking in circuit board 202.The inventors, in addition to discovering the source of cracks incircuit boards having a single surface layer, have also discovered thatcracks in a circuit board having two surface layers, such as circuitboard 202 shown in FIG. 2C, frequently occur on one of the surfaces ofcircuit board 202 at stress concentration points located above fiberhills, such as fiber hills 233 and 235, and that cracks are less likelyto occur at stress concentration points located above fiber valleys. Inboard assembly 200, which is shown in FIG. 2A, stress concentrationpoints occur along an edge of an interface between two surfaces, such asalong the edge of adhesive 205 at the interface between adhesive 205 andcircuit board 202. The inventors also discovered that cracks at stressconcentration points were most likely to occur during the solder reflowprocess when temperature gradients are being formed in board assembly200. Referring again to FIG. 2C, once a surface crack intersects afiber, such as one of the number of fibers 231, the crack proceeds alongthe interfacial interface between one of the number of fibers 231 andthe material in which one of the number of fibers 235 is embedded. Theinventors also discovered that by increasing the thickness 237 ofsurface layer 225 to between about 10% and 15% of circuit boardthickness 241 and the thickness 239 of surface layer 227 to betweenabout 10% and 15% of circuit board thickness 241, the likelihood ofcrack formation on the surface of circuit board 202 is decreased.Therefore, first surface layer thickness 237 is preferably between about10% and about 15% of circuit board thickness 241 and second surfacelayer thickness 239 are preferably between about 10% and about 15% ofcircuit board thickness 241.

FIG. 3 is a block diagram of one embodiment of a computer system 300suitable for use in connection with the present invention. System 300comprises processor 305 and memory board assembly 310 including one ormore circuit boards shown in FIGS. 2B and 2C according to the teachingsof the present invention. Memory board assembly 310 comprises memoryarray 315, address circuitry 320, and read circuitry 330, and is coupledto processor 305 by address bus 335, data bus 340, and control bus 345.Processor 305, through address bus 335, data bus 340, and control bus345 communicates with memory board assembly 310. In a read operationinitiated by processor 305, address information, data information, andcontrol information are provided to memory board assembly 310 throughbusses 335, 340, and 345. This information is decoded by addressingcircuitry 320, including a row decoder and a column decoder, and readcircuitry 330. Successful completion of the read operation results ininformation from memory array 315 being communicated to processor 305over data bus 340.

CONCLUSION

A number of circuit boards, circuit board assemblies, and methods offabricating circuit boards and circuit board assemblies have beendescribed. The circuit boards include a number of layers including acore layer and one or more surface layers. The core layer includes anumber of embedded fibers to increase the strength of the core layer.Cracking is reduced in the surface layer or layers by fabricating thesurface layers with a thickness sufficient to reduce the probability ofstress concentration points inducing cracks during the heating andcooling of the circuit board. The methods described for fabricating acircuit board include forming a core layer including a number of fibers,and forming a surface layer on the core layer, such that the surfacelayer is free of fibers and has thickness that is between about 10% and30% of the circuit board thickness. Cracking is reduced in the surfacelayer or layers of circuit boards fabricated using the methods of thepresent invention.

Although specific embodiments have been illustrated and describedherein, it will be appreciated by those of ordinary skill in the artthat any arrangement which is calculated to achieve the same purpose maybe substituted for the specific embodiment shown. This application isintended to cover any adaptations or variations of the presentinvention. Therefore, it is intended that this invention be limited onlyby the claims and the equivalents thereof.

1. A method of fabricating a circuit board having a circuit boardthickness, the method comprising: forming a core layer including anumber of fibers; and forming a surface layer on the core layer, thesurface layer having a surface layer thickness that is between about 10%and about 30% of the circuit board thickness, the surface layer beingfree of fibers.
 2. The method of claim 1, wherein forming a core layerincluding a number of fibers comprises embedding the number of fibers ina resin.
 3. The method of claim 1, wherein forming a core layerincluding a number of fibers comprises embedding the number of fibers ina polymeric composite material.
 4. The method of claim 1, forming a corelayer including a number of fibers comprises embedding the number offibers in phenolic.
 5. A method of fabricating a circuit board having acircuit board thickness, the method comprising: forming a core layerincluding a number of fibers; and forming a surface resin layer on thecore layer, the surface layer having a surface layer thickness that isbetween about 10% to 30% of the circuit board thickness.
 6. The methodof claim 5, further comprising forming a number of slots in the circuitboard.
 7. The method of claim 5, further comprising mounting a die usingan adhesive over each of the number of slots.
 8. A method of fabricatinga circuit board having a circuit board thickness comprising: forming acore layer including a number of fibers; forming a first layer on thecore layer, the first layer having a thickness between about 10% andabout 15% of the circuit board thickness and the first layer being freeof fibers; and forming a second layer on the core layer, the secondhaving a thickness that is between about 10% and about 15% of thecircuit board thickness.
 9. The method of claim 8, wherein forming acore layer including a number of fibers comprises embedding the numberof fibers in a resin.
 10. The method of claim 8, wherein forming a corelayer including a number of fibers comprises embedding the number offibers in a polymeric composite material.
 11. The method of claim 8,forming a core layer including a number of fibers comprises embeddingthe number of fibers in phenolic.
 12. A method of fabricating a circuitboard having a circuit board thickness comprising: forming a core layerincluding a number of fibers; forming a first layer on a first side ofthe core layer, the first layer having a thickness between about 10% andabout 15% of the circuit board thickness and the first layer being freeof fibers; and forming a second layer on a second side of the corelayer, the second having a thickness that is between about 10% and about15% of the circuit board thickness.
 13. The method of claim 1, whereinforming a core layer including a number of fibers comprises embeddingthe number of fibers in one of a group consisting of a resin, apolymeric composite material, and phenolic.
 14. A method of fabricatinga circuit board having a circuit board thickness comprising: forming acore layer including a number of fibers; forming a first resin layer onthe core layer, the first resin layer having a thickness between about10% and about 15% of the circuit board thickness; and forming a secondresin layer on the core layer, the second resin layer having a thicknessthat is between about 10% and about 15% of the circuit board thickness.15. The method of claim 14, wherein forming the core layer includesembedding the fibers in a resin layer.
 16. The method of claim 14,wherein forming a core layer including a number of fibers comprisesembedding the number of fibers in one of a group consisting of apolymeric composite material and phenolic material.
 17. A method offabricating a circuit board having a circuit board thickness, the methodcomprising: forming a core layer including a number of fibers; andforming a surface layer on the core layer, the surface layer having asurface layer thickness that is about 20% of the circuit boardthickness, the surface layer being free of fibers.
 18. The method ofclaim 16, wherein forming a core layer including a number of fiberscomprises embedding the number of fibers in one of a group consisting ofa resin, a polymeric composite material, and phenolic material.
 19. Amethod of fabricating a circuit board having a circuit board thickness,the method comprising: forming a core layer including a number of fibershaving a diameter of between about 0.0005 inch and about 0.001 inch anda second dimension; and forming a surface layer on the core layer, thesurface layer having a surface layer thickness that is between about 10%and about 30% of the circuit board thickness, the surface layer beingfree of fibers.
 20. The method of claim 19, wherein the core layer has athickness of between about 0.006 inch and about 0.012 inch.
 21. Themethod of claim 20, wherein the surface layer is about 20% of thecircuit board thickness.
 22. The method of claim 21, wherein the surfacelayer includes a first resin layer on the core layer and a second resinlayer.
 23. A method of fabricating a circuit board having a circuitboard thickness, the method comprising: forming a core layer including anumber of fibers; forming a surface resin layer on the core layer, thesurface layer having a surface layer thickness that is between about 10%and 30% of the circuit board thickness; forming a number of slots in thecircuit board; and mounting a die using an adhesive over each of thenumber of slots.
 24. The method of claim 23, wherein mounting the dieincludes mounting a memory over the slots.
 25. The method of claim 24,wherein the memory includes a dynamic random access memory.